Single ended, separately driven, resonant DC-DC converter

ABSTRACT

A single ended, separately driven, resonant DC-DC converter including a transformer, a capacitor connected in parallel with a primary winding of the transformer, a switching transistor connected between one end of the primary winding of the transformer and one end of a DC power source, and a blocking oscillating circuit for driving the switching transistor. The blocking oscillating circuit is directly driven by the DC power source and contains circuits for properly setting a pulse width and a pulse stop period of output pulses from the blocking oscillating circuit.

BACKGROUND OF THE INVENTION

The present invention relates to a DC-DC converter including a blockingoscillating circuit and a voltage resonance type switching circuit.

A DC-DC converter of the type in which a first DC voltage is convertedinto a voltage with a rectangular wave by means of a switching circuit,the rectangular wave voltage is smoothed through a transformer, and thesmoothed voltage is supplied to a load, as a second DC voltage, has beenknown. This type of DC-DC converter, because of meritorious features ofsmall size and light weight, has widely been used as DC power sourcesfor terminal equipment of computers and general communication equipment.This is especially true for a small capacity DC-DC converter with anoutput of 200 W or less of the single end type in which a switchingelement for turning on and off a first DC voltage is inserted betweenone end of the transformer and a first DC voltage source, because of itslow cost and simple construction. For further details of the single endtype DC-DC converter, reference is made to IEEE Power ElectronicConference, 1977, pp 160, "A New Optimum Topology Switching DC-DCconverter". A basic switching scheme in the DC-DC converter iscategorized into a buck power stage system, a boost power stage system,a buck-boost power stage system, and a boost-buck power stage system.Common to those systems is a conversion of the DC power source voltageinto a voltage having a rectangular wave. The common feature increases aswitching loss of the switching element making up the switching circuitto necessitate a radiator plane for radiating heat. A self-exciting typecircuit with omission of an oscillating circuit for driving theswitching circuit, employed in the switching system, hinders theincrease of the switching speed by a feedback action. A voltageresonance type switching system as a modification of the buck-boostpower stage system as mentioned above, allows the improvement of aswitching efficiency by shaping "L" the switching characteristic of theswitching element. The "L shaping" of the switching characteristic meansthat in the graph in which a current of the switching element is plottedon an ordinate and a voltage between terminals of the switching elementis plotted on an abcissa the switching element is operated to form thevoltage-current characteristic of "L" Shape. This approach indeedsucceeds in increasing the switching efficiency, but needs an externaldrive circuit and an auxiliary power source for driving the switchingelement, resulting in the complexity of the construction of a DC-DCconverter. In this respect, there has been a demand for driving theswitching element by the output of an oscillating circuit driven by thefirst DC voltage mentioned before. The attempt, however, has beenunsuccessful in that the mere use of an oscillating circuit provides anunstable or abnormal oscillation output due to a counter action of theswitching circuit.

SUMMARY OF THE INVENTION

Accordingly, an object of the present invention is to provide a DC-DCconverter which ensures a stable DC-DC conversion, in which, in a DC-DCconverter having a switching element inserted between a DC power sourceand an input terminal of a transformer, for example, a blockingoscillator with an output stabilizing means directly driven by the DCpower source voltage is used as an oscillator for driving a switchingcircuit of the voltage resonance type.

According to the present invention, there is provided a DC-DC convertercomprising: an ideal transformer with a leakage inductance and anexciting inductance in the primary winding; a capacitor connected inparallel with the exciting inductance of the ideal transformer;switching means of the voltage resonance type including a switchingelement connected between the primary winding of the ideal transformerand an input DC power source, the switching means periodicallyinterrupting a voltage of the DC power source; a blocking oscillatingcircuit with output stabilizing means which directly receives a voltageof the input DC power source and controls the switching means by theoscillating output; and means for rectifying and smoothing the outputfrom the secondary winding of the ideal transformer and for supplyingthe rectified and smoothed output to a load.

The stabilizing means of the blocking oscillating circuit including ameans for individually change a pulse width and a pulse stop period ofan output signal from the blocking oscillating circuit, a means forkeeping the pulse width and the pulse stop period at fixed values, or ameans for preventing a reaction or counter action from the switchingcircuit to the blocking oscillating circuit.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of a prior blocking oscillating circuit;

FIGS. 2A to 2E and 3 are waveforms useful in explaining an operation ofthe circuit shown in FIG. 1;

FIG. 4 is a circuit diagram showing an embodiment of a DC-DC converteraccording to the present invention;

FIG. 5 shows a circuit diagram of the blocking oscillating circuit shownin FIG. 4;

FIGS. 6A to 6C are waveforms useful in explaining the operation of theblocking oscillating circuit shown in FIG. 5;

FIGS. 7A to 7C show waveforms useful in explaining the operation of theDC-DC converter shown in FIG. 4;

FIGS. 8, 8B and 9 show circuit diagram of first, second and thirdmodifications of the blocking oscillation circuit shown in FIG. 4;

FIG. 10 is a circuit diagram showing another embodiment of a DC-DCconverter according to the present invention;

FIG. 11A is a circuit diagram showing a fourth modification of theblocking oscillator shown in FIG. 4;

FIGS. 11B to 11D are equivalent circuit diagrams useful in explainingthe operation of the circuit shown in FIG. 11A;

FIGS. 12A to 12D are waveform diagrams helpful in explaining theoperation of the circuit in FIG. 11A;

FIGS. 13A and 13B are circuit diagrams showing modifications of FIG.11A;

FIG. 14 shows a diagram of another blocking oscillating circuit usableas the blocking oscillating circuit shown in FIG. 4;

FIG. 15 shows a diagram of still another blocking oscillating circuitwhich is usable as the blocking oscillating circuit shown in FIG. 4; and

FIGS. 16 to 23 are circuit diagrams showing modifications of theblocking oscillating circuit shown in FIG. 15.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 4 shows an embodiment of a DC-DC converter according to the presentinvention. An AC power source of 100 V, for example, is rectified by afull-wave rectifying circuit 1, and a rectified output is smoothed by asmoothing capacitor 2, thereby to obtain an input DC voltage Vcc. Ablocking oscillating circuit 3 is supplied with the input DC voltage Vccand a voltage G of a ground level as its inputs. A transformer 5 forpower transmission includes a primary coil 5a and a secondary coil 5bwith polarities indicated by black dots. The primary coil 5a isconnected in parallel with a resonance capacitor 6. A collector-emitterpath of a power transistor 4 is connected between the power sourcevoltage Vcc and one end of the primary coil 5a. A damper diode 7polarized as shown is connected in parallel to the collector-emitterpath. An output terminal B of the blocking oscillating circuit 3 iscoupled with the base of the transistor 4, and another output terminal Eis connected to the emitter of the transistor 4. The power sourcevoltage Vcc-G (referred often to as Vcc) is converted into a voltagewith a rectangular wave by the transistor 4 controlled by the outputs Band E of the oscillating circuit 3, and the rectangular wave is takenout after being voltage-converted by the primary coil 5a and thesecondary coil 5b magnetically coupled with each other. The secondarycoil 5b is connected in series with a choke coil 8 and a rectifyingdiode 9, and the voltage-converted rectangular wave is supplied to apredetermined load 11 after being smoothed by the smoothing capacitor10.

In the DC-DC converter shown in FIG. 4, an output characteristic of theblocking oscillating circuit 3 must be extremely stable. The blockingoscillating circuit used in the present invention has a novel outputstabilizing means. The output stabilizing means includes a means whichis either for keeping both an output pulse width and a pulse stop periodconstant or for freely setting the output pulse width and the pulse stopperiod. The blocking oscillating circuit 3 can be modified variously.For clearer understanding the differences of the arrangement, functionand operation of those modifications from a prior blocking oscillatingcircuit, the prior blocking oscillating circuit will be describedreferring to FIGS. 1, 2A to 2E and 3.

In FIG. 1, a series circuit of a resistor R and a capacitor C andanother series circuit of a primary coil TA of a transformer T and aswitching transistor TR are connected between terminals of a powersource E. A base of the transistor TR is connected to a junction pointof the resistor R and the capacitor C via a secondary coil TB. A diode Dwith polarities as shown is connected between the terminals of theprimary coil TA. An oscillation output is taken out from the tertiarycoil TC. FIG. 2 shows a waveform of a collector voltage of thetransistor TR, FIG. 2B shows a waveform of a charge/dischargecharacteristic of the capacitor C, FIG. 2C illustrates a waveform of acollector current of the transistor TR, FIG. 2D shows a waveform of abase current of the transistor TR, and FIG. 2E illustrates a waveform ofan output from the tertiary coil TC. FIG. 3 shows the detail of acharge/discharge characteristic of the capacitor C. During the outputpulse stop period T_(S), the capacitor C is charged negative and thetransistor TR is in the cut-off condition. During this period T_(S), thecharge in the capacitor C is discharged to the power source E throughthe resistor R, and the potential across the capacitor C rises to becomepositive, a base current flows through the transistor TR, so that thetransistor TR is turned ON. More particularly, because of the flow ofthe collector current, a positive feedback is active, and the basecurrent increases, with the result that the transistor TR is rapidlysaturated. During a period T_(P) (a pulse period) that a voltage of thepower source E is fully applied to the primary coil TA, the base currentgradually decreases with a gradual increase of an exciting current foran inductance of the primary coil TA. At an instant that a valueobtained by multiplying the base current by a current amplificationfactor of the transistor TR becomes equal to the collector current, thetransistor TR is rapidly cut off. At the cut-off time, the excitingcurrent residual in the primary coil TA is absorbed by the diode D. Thecut-off condition is kept until the capacitor C charged during the OFFperiod of the transistor TR is discharged. That is, the pulse stopperiod T_(S) is set up. In the blocking oscillating circuit shown inFIG. 1, an internal resistance of the transistor TR is very small at thetime of its saturation. Then, it is deemed that the transformer T isshorted by the transistor TR. Therefore, the output impedance of theblocking oscillating circuit is low and therefore the oscillatingcircuit is suitable for a pulse power source. However, when the voltageof the power source E is high or the circuit is operated with a highfrequency output, the rise and fall characteristics of the output pulsebecome poorer, and the stop period T_(S) becomes shorter than a designedvalue. The reason for this follows. When transistor TR shifts from theON state to the OFF state, the current flowing through the secondarywinding TB is inverted. Nevertheless, the transistor TR is incompletelycut off. Therefore, the capacitor C is temporarily shorted through thetransistor TR. As the result of the instantaneous shortcircuiting, thecharge in the capacitor C is partially lost as shown in FIG. 3. Also,there is a case that the collector current and the base current varywith temperature and hence the oscillation frequency is not stabilized.Therefore, it is difficult to directly apply the prior blockingoscillation circuit shown in FIG. 1 to the DC-DC converter shown in FIG.4 without modifying.

An embodiment of the blocking oscillating circuit 3 used in a DC-DCconverter according to the present invention is illustrated in FIG. 5.Since the blocking oscillating circuit 3 has a small output impedance,as well known, it is convenient in use when the switching element 4 is abipolar transistor. In FIG. 5, a collector-emitter path of an npnswitching drive transistor 14 is connected between the input terminalsVcc and G in series with a resistor 12 and a primary winding 13a of adrive transformer 13. A series circuit of a resistor 15 and a capacitor16 is connected between the input terminals Vcc and G, as a timeconstant circuit to determine an off period of the transistor 14. Thenot grounded terminal of the capacitor 16 is connected to the base ofthe transistor 14 through a secondary winding 13b of the drivetransformer 13. A base current is designated by i_(b). The polarities ofthe primary winding 13a and the secondary winding 13b of the transformer13 are set so as to be opposite to each other, as indicated by the blackdots. In other words, the polarities are set so that when an excitationcurrent of the primary winding 13a is generated backward, it is fed backto the base of the transistor 14. A series circuit of a resistor 17 anda diode 18 with the polarity as shown is connected in parallel betweenthe terminals of the capacitor 16. The pulse width of the oscillatingcircuit 3 is adjusted by means of this series circuit to determine thedischarge characteristic of the capacitor 16. Further, a resistor 20 anda capacitor 21 are connected in parallel with the series circuit of atertiary winding 13c of the transformer 13 and a diode 19 with thepolarity as shown, thereby to determine a pulse stop period of theoutput signal of the oscillator 3.

Further, a quartic winding 13d to lead out an output pulse of theoscillating circuit 3 is provided in the transformer 13. An output B ofthe quartic winding 13d is applied to the base of the transistor 4 andan output E thereof is also applied to an emitter of the transistor 4. Aresistor 22 is connected between the outputs B and E. A parallelparallel circuit of a resistor 24 and a diode 23 with the polarity asshown is provided to prevent the backward current from one terminal ofthe quartic winding to the output terminal B is inserted between boththe terminals. A shield plate 25 designated by a dotted line is setbetween the quartic winding 13d and the other windings to prevent avoltage induced by a voltage change, as a reaction to the switchingoperation of the transistor 4, from sneaking into the winding 13a, 13band 13c except the quartic winding 13d. The potential of theelectrostatic shield plate 25 is kept at one level G of the input DCvoltage, thereby to prevent capacitive coupling of the quartic coil 13dwith the remaining windings 13a, 13b and 13c. Accordingly, the inducedvoltage arising from a voltage change of the switching circuit includingthe transistor 4 is prevented from reaching the blocking oscillatingcircuit 3.

An operation condition of the DC-DC converter shown in FIG. 4 is set upas given below. It is assumed that the switching circuit including thetransistor 4 executes a switching operation of the voltage resonancetype with a sub-class E mode. More specifically, a magnetic energystored in an inductance of the primary winding 5a of the transformer 5during the conduction of transistor 4 is charged into a capacitor 6 forthe resonance, during the off-period of the transistor 4. As a result,an output voltage of the transistor 4 changes like a sine wave. Avoltage between the collector and the emitter of the transistor 4 is setat zero through the action of the damper diode 7 after the half periodof the sine wave. The transistor 4 is driven so as to conduct againduring the period that the collector-emitter voltage is zero.Specifically, a conduction period and a nonconduction period of thetransistor 4 are set by an inductance of the primary winding 5a of thetransformer 5, a choke coil 8 including a leakage inductance and acapacitance of the resonance capacitor 6, for supplying the electricpower to the load 11 at the input voltage Vcc. Even if a feedbackwinding (not shown) is provided in the transformer 5, and the outputfrom the feedback winding is fed back to the base of the transistor 4,it is impossible to satisfy the operating condition. On the other hand,the DC-DC converter according to the present invention can execute theswitching operation of the voltage resonance type by driving thetransistor 4.

The conduction period of the transistor 4 is substantially determined bythe inductance of the primary winding 13a of the blocking oscillatingcircuit 3, the current amplification factor β of the transistor 14, andthe resistance of the resistor 17 for setting the pulse width. Theoff-period of the transistor 4, i.e. a nonconduction period, issubstantially determined by the time constant given by the resistance ofthe resistor 15 and the capacitance of the capacitor 16, and theresistance of the resistor 20 for setting the off-period of thetransistor 4. With this circuit arrangement, only the pulse width of theoutput signal from the blocking oscillating circuit 3 may be changed byproperly selecting a set value of the resistor 17 for setting the pulsewidth, without any change of the basic operating condition in theoscillating circuit 3. In other words, this does not affect thedetermination of the off-period of the transistor 4. Additionally, onlythe off-period of the transistor 14 can independently be set by the setvalue of the resistor 20 for setting the off-period of the transistor14, without any effect upon the pulse width setting condition of theoutput pulses of the transistor 14. With the arrangement toindependently set the pulse width of the output pulses from theoscillating circuit 3 and the pulse stop period, the operating conditionof the apparatus shown in FIG. 4 can be satisfied by a simple circuitconstruction.

How the output voltage waveform of the transistor 4 in the DC-DCconverter shown in FIGS. 4 and 5 affects the oscillating condition ofthe blocking oscillating circuit 3, will be discussed referring towaveforms shown in FIGS. 6A to 6C, and FIGS. 7A to 7C. Waveforms in therespective portions of the blocking oscillator 3 are illustrated inFIGS. 6A to 6C. Waveforms in the respective portions of the switchingcircuit containing the transistor 4 are shown in FIGS. 7A to 7C. In FIG.6A, the time length 0-T_(ON) indicates an on-period of the transistor14; the time length T_(ON) -T1 an off-period of the transistor 14; i_(c)a collector current of the transistor 14; and i_(cp) a peak value of thecollector current i_(c). In FIG. 6B, i_(b) designates a base current ofthe transistor 14, and i_(bo) indicates a base current for determining acurrent amplification factor β=i_(cp) /i_(bo) of the transistor 14. InFIG. 6C vc designates a terminal voltage across the capacitor 16,Vs=n_(b) ×Vcc (n_(b) designates a turn ratio of the primary winding 13aof the transformer 13 to the secondary winding 13b), V_(R) =nn·Vconst (nindicates a turn ratio of the tertiary winding 13c of the transformer 13to the secondary winding 13b, and Vconst stands for a terminal voltageacross the resistor 20), V_(BE) designates a minimum base voltagerequired for the conduction of the transistor 14. In FIGS. 6A to 6C, thewaveform indicated by the broken line is produced due to the voltageinduced in the capacitor 16 during the off-period of the transistor 4.In FIG. 7A, i_(c) stands for a collector current of the transistor 4, 30a waveform of the current i_(c) when the load 11 has a rate value, Ip1 apeak value of the waveform 30, 31 a waveform of the current i_(c) whenthe load 11 is light, Ip2 a peak value of the waveform 31. In FIG. 7B,vc designates an output voltage of the transistor 4, 32 a waveform ofthe voltage vc at the rated load, vcmax1 its peak value of the waveform32, 33 a waveform of the voltage vc at a light load, vcmax2 its peakvalue of the waveform 33, Vcc an input voltage level of the oscillatingcircuit 3. In FIG. 7C, iLP represents a waveform of an excitationcurrent flowing through the primary winding 5a of the transformer 5 atthe rated load, 34 a waveform of the current iLP at the rated load,I_(LP1) the peak value of the waveform 34, 35 a waveform of the currentand iLP at a light load, I_(LP2) the peak value of the waveform 35.

When the switching circuit containing the transistor 4 operates in astationary mode, the transistor 4 turns off for a period of T_(ON) -T1(FIG. 7A). The waveform of the output voltage of the transistor 4 duringthe off-period is substantially sinusoidal, as indicated by the waveform32. The sinusoidal voltage 32 is induced into the capacitor 16 by way ofa capacitance between the quartic winding 13d and the secondary winding13b of the transformer 13 in the blocking oscillating circuit 3. As aresult of the voltage induction, the polarity of the amplitude of thevoltage across the capacitor 16 changes, as seen from curves 36 and 37designated by a broken line in FIG. 6C. A problem encountered here isthat the voltage across the capacitor 16 has a spike (see a curve 37) att=T2 (FIG. 6C) and the level of the spike exceeds the base voltage levelV_(BE) necessary for the transistor conduction between the base andemitter of the transistor 14. When the spike exceeds the level V_(BE),the transistor 14 conducts at time t=T2 (FIG. 6A) before t=T1 by thepositive feedback action of the oscillating circuit 3. As a result, theoscillating period of the oscillating circuit 3 becomes short. Theconduction of the transistor 14 at time t=T2 has a serious effect on theoperation of the DC-DC converter. Under this condition, during theoff-period of the transistor 4 (T_(ON) T1 in FIG. 7A) during this timeduration that a voltage is applied to the collector of the transistor 4,the transistor 4 starts the next ON operation. The result is that anexcessive spike current flows into the transistor 4, resulting in anabrupt increase of the switching loss of the transistor 4. It is notedthat the DC-DC converter of the present invention uses an electrostaticshielding plate 25 to reduce the capacitance among the windings of thetransformer 13 and therefore the capacitive coupling among the windingsis prevented. Accordingly, no voltage is induced in the capacitor 16when the transistor 4 is turned on and off. Then, the voltage vc acrossthe transistor 14 never exceeds the voltage V_(BE) during the periodT_(ON) -T1, as indicated by the curve 37 in FIG. 6C. Thus, theoscillating circuit 3 operates stably. In addition to the stableoperation, the pulse width of the output signal from the oscillatingcircuit 3 and the pulse stop period between the adjacent pulses canindependently be set, as mentioned above. Therefore, the oscillatingcircuit 3 may be oscillated, while the input DC voltage Vcc is appliedto the oscillating circuit 3, and the switching circuit including thetransistor 4 can be driven without any auxiliary power source.

In the DC-DC converter shown in FIGS. 4 and 5, even if the load 11changes, the oscillating period of the oscillating circuit 3automatically changes to allow the switching waveform of the voltageresonance type by the transistor 4 to be invariable. In the voltageresonance type switching circuit, when the load 11 gradually changesfrom the rated load to a light load, the switching period of thetransistor 4 gradually becomes long if the conduction duration of theswitching transistor 4 is fixed. For example, when the waveform 30 ofthe collector current i_(c) of the transistor 4 at the rated load ischanged to the wave form 31 at the light load, as shown in FIG. 7A, thenonconduction period of the transistor 4 changes from the period T_(ON)-T1 to T_(ON) -T2. The half period of the output voltage vc (FIG. 7B) inthe off-period of the transistor 4 also changes T_(ON) -τ1 to T_(ON)-τ2; that is τ2>τ1. When the load 11 becomes lighter and the half periodof the wave form 33 becomes long, T_(ON) -τ2 exceeds T_(ON) -T1 (FIG.7A). In this case, when the operation period of the transistor 4 is leftequal to the period at the rated load, a large spike current flows intothe transistor 4 at time t=T1, thereby possibly to destroy thetransistor 4. For example, in the blocking oscillating circuit 3according to the present invention, the oscillating period changes inaccordance with a variation of the load of the quartic winding 13d. Thechange of the load has a direction that when the load of the quarticwinding 13d is light, the oscillation stop period (T_(ON) -T1 in FIG.7A) becomes long and hence the drive period of the transistor 4 becomeslong. Therefore, according to the DC-DC converter shown in FIG. 4, thetransistor 4 can be stably driven, irrespective of the variation of theload 11.

With respect to the control of the output from the blocking oscillatingcircuit 3, the resistor 17 for pulse width setting and the pulse stopperiod setting resistor 20 in FIG. 5 may be substituted by a variableimpedance element, respectively. Further, in FIG. 4, the voltagetransformer 5, as a means for transmitting electric power to the load11, may also be replaced by a choke coil. The power transmission meansincluding a voltage transformer or a choke coil may be expressed by anideal transformer including a leakage inductance and an excitinginductance in the primary winding. Further, the connecting positions ofthe transistor 4 and the transformer 5 may be replaced with each other.

FIGS. 8A and 8B shows an arrangement of a blocking oscillating circuitwhich can be used in place of the blocking oscillating circuit shown inFIG. 5. The oscillating circuit shown in FIG. 8A employs the common baseconnection for the transistor 14, while the transistor connection inFIG. 5 is of the common emitter type. The transistor connection in theoscillating circuit of FIG. 8B is of the common collector type. In thosefigures, like reference numerals are used to designate like portions inFIG. 5. Therefore, no further explanation of those portions will begiven. In FIG. 8A, the emitter of the transistor 14 is grounded througha series circuit of the diode 40 and the secondary winding 13b of thetransformer 13. The base of the transistor 14 is directly connected tothe connection point between the resistor 15 and the capacitor 16. InFIG. 8B, the collector of the transistor 14 is connected to a resistor12, and the emitter thereof is grounded through the series circuit ofthe primary winding 13a and the secondary winding 13b of the transformer13. The base of the transistor 14 is connected to a connection pointbetween the resistor 15 and the capacitor 16. The junction point betweenthe capacitor 16 and the resistor 17 is connected to the connectionpoint between the primary winding 13a and secondary winding 13b of thetransformer 13. The oscillating circuit shown in FIGS. 8A or 8B servesas a DC--DC converter, like the oscillating circuit shown in FIG. 5.Therefore, the explanation of the operations of those circuits will beomitted.

Another arrangement shown in FIG. 9 may be used in place of the blockingoscillating circuit 3 shown in FIG. 4. In FIG. 9, like referencenumerals are used to designate like portions in FIG. 5, and theexplanation of those portions will be omitted. A bidirectional Zenerdiode 41 is connected between the base of the transistor 14 and thesecondary winding 13b of the transformer 13, through a resistor 42. Acapacitor 43 is connected between the base of the transistor 14 and thesecondary winding 13b. A transistor 44 has a collector-emitter pathconnected between the base and emitter of the transistor 14. A resistor45 is connected between the junction point of the secondary winding 13bwith the capacitor 43 and the base of the transistor 44. Anothercapacitor 46 is connected between the base and emitter of the transistor44. The oscillating circuit in the present embodiment operates insubstantially the same manner as the blocking oscillating circuit shownin FIG. 5.

FIG. 10 shows an arrangement of another embodiment of a DC-DC converteraccording to the present invention. In the figure, like numerals areused to designate like portions in FIGS. 4 and 5, and no furtherexplanation of those portions will be given. In the present embodiment,an emitter-collector path of the transistor 47 as a variable resistiveelement is used in place of the resistor 20 for setting the pulse stopperiod of the output pulse from the oscillating circuit 3. Theresistance of the transistor 47 is controlled by the collector voltageof a transistor 49 which responds to a difference between the terminalvoltage across the load 10 and a reference voltage from the referencevoltage setting element 48. Through the resistance control, the outputvoltage of the load 11 is controlled in a feedback manner. The presentembodiment can limit a regulation of the voltage of the load 11 to 2% orless.

In each of the blocking oscillating circuits shown in FIGS. 5, 8A, 8B, 9and 10, the pulse width and the pulse stop period of the output from theoscillating circuit can be individually set and the shield plate 25 isused. The blocking oscillating circuits shown in FIGS. 5, 8A, 8B, 9 and10 may be replaced by any of blocking oscillating circuit 3 shown inFIGS. 11A, 13A, 13B and 14. The oscillating circuit 3 of each of thosefigures has a means to independently adjust the pulse width and thepulse stop period of the output signal thereof, but has no shield plate25. The prior blocking oscillating circuit frequently operates unstablyor stops its oscillation when the input DC voltage (Vcc in FIG. 4) fallswithin a range of 100 to 400 V. On the other hand, in the blockingoscillating circuit according to the present invention, suchdisadvantages of the prior art can be removed by adjusting the outputpulse width and the pulse stop period. Accordingly, the blockingoscillating circuit is well adaptable for the DC-DC converter.

In FIG. 11A, like reference numerals designate like portions in FIG. 5.In the figure, reference numeral 55 designates a DC power source ofwhich the output voltage Vcc is set within 100 to 400 V. As in the caseof FIG. 5, the npn transistor 14 is connected across the power sourcethrough the resistor 12 and the primary winding 13a of the transformer13. The capacitor 16 is connected across the power source 55 through theresistor 15. The base of the transistor 14 is connected to the junctionpoint between the capacitor 16 and the resistor 15 through the secondarywinding 13b of the transformer 13. A series circuit of a diode 51polarized as shown, a Zener diode 52 and a variable resistor 53 isconnected between the base and emitter of the transistor 14. The seriescircuit of the diode 18 and the variable resistor 17 is connected acrossthe capacitor 16. In the present embodiment, the tertiary winding 13c,which is for supplying an output signal of the blocking oscillatingcircuit to the terminals B and E in FIG. 4, is connected to a loadresistor 54. When Vcc is 100 to 400 V, the resistance of the resistor 12is set at 100 ohms or more. The resistance of the resistor 17 is soadjusted to be smaller than the impedance of the capacitor 16 at thefrequency of the output signal from the oscillating circuit. The valueof the load resistor 54 is selected to have the quotient when theresistance of the resistor 12 is divided by the square of the turn ratioof the number of turns of the tertiary winding 13c to the primarywinding 13a.

In the blocking oscillating circuit shown in FIG. 11A, the output pulsestop period is adjusted to a proper period by gradually damping theexcitation current of the transformer 13 by a variable resistor 53. Thepulse width is adjusted to a proper width by changing the currentcharged in the capacitor 16 by a variable resistor 17. The operation ofthe circuit shown in FIG. 11A will be described referring to equivalentcircuits shown in FIGS. 11B to 11D and waveforms shown in FIGS. 12A to12D. In FIG. 12A, i_(c) designates the collector current of thetransistor 14 and i_(c)(τ1) is i_(c) when t=τ1, and i_(c)(0) is i_(c)when t=0. In FIG. 12B, i_(b) is the base current of the transistor 14,and iL(t0) is the excitation current flowing into the primary winding13a when t=0. In FIG. 12C, Vc is the voltage across the capacitor 16,Vc2=(terminal voltage across the load 54)/n' (n' is the turn ratio ofthe secondary winding 13b to the tertiary winding 13c), and V2=Vcc/n (nis the turn ratio of the primary winding 13a to the secondary winding13b). In FIG. 12D, V_(BE) is the voltage between the base and emitter ofthe transistor 14. Vc1 is the charging voltage across the capacitor 16when t=τ1.

During period 0≦t≦τ1 (FIG. 12A), the transistor 14 saturates. During thesaturated period, the circuit in FIG. 11A may be expressed by anequivalent circuit shown in FIG. 11B. In FIG. 11B, the resistor rbrepresents the resistance between the base and emitter of the transistor14. The resistor 17' represents the value converted by a turn ratio ofthe primary winding 13a of the secondary winding 13b. The resistance 54'represents the value of the load resistor 54 converted by the turn ratioof the primary winding 13a to the tertiary winding 13c. The capacitanceof the capacitor 16' is a converted value of the capacitance of thecapacitor 16 converted by the turn ratio of the primary winding 13a tothe secondary winding 13b. The collector current i_(c) of the transistor14 flowing into the resistor 12 when the transistor 14 is saturated isthe sum of the currents flowing into the resistor 54', the excitationinductance of the primary winding 13a, and the resistor rb. Thevariation of the collector current against time is plotted in FIG. 12A.As shown, at time t=0 when the transistor 14 conducts, a currenti_(c)(0) defined as the quotient when Ein (=Vcc) id divided by theparallel resistance of resistors 54' and (rb+17') flows and then thecurrent flowing into the inductance of the primary winding 13a graduallyincreases. Accordingly, the terminal voltage across the primary winding13a decreases. As a result, the current i_(b) decreases with time, asshown in FIG. 12B. When t=τ1, the ratio of i_(c)(τ1) to i_(b)(τ1) isequal to the current amplification factor β. When t=τ1, the transistor14 is abruptly turned off.

Part of the current i_(b) flowing through the base resistor rb of thetransistor 14 charges the capacitor 16. The polarity of the charging isto maintain the off condition of the transistor 14, as indicated by thewaveform 60 shown in FIG. 12C. When the value of the resistor 17' issmaller than the initial one, the base current i_(b) of the transistor14 is as indicated by a broken line 61 in FIG. 12B. In other words, thetemperature impedance of the capacitor 16 increases as the amount of thecharging charge increases with time. When the temperature impedanceexceeds the resistance of the resistor 17', the current flowing into theresistor 17' increases with respect to the current flowing into thecapacitor 16. Thus, the decreasing rate of the base current i_(b) isgentle. As the result, a time until the ratio i_(c)(τ1) /i_(b)(τ1)reaches the current amplification factor β of the transistor 14 iselongated. This implies that the turn-off timing of the transistor 14 isdelayed and the output pulse width of the blocking oscillating circuitis large. In the blocking oscillating circuit applied for the DC-DCconverter of the present invention, the output pulse width may beadjusted to a proper value by changing a value of the resistor 17.

In FIG. 11A, the operation of the oscillating circuit during the period(τ1≦t≦T in FIG. 12A) that the transistor 14 is turned off may beanalyzed in the following manner. The off-period may be divided into twosegmental periods; a segmental period 63 (τ1 to τ2) and a segmentalperiod 64 (τ2 to T). The blocking oscillating circuit during the periods63 and 64 are expressed by equivalent circuits shown in FIGS. 11C and11D respectively. During the period 63, the back electromotive voltageinduced in the secondary winding 13b is added to the charging voltageVc1 which has been charged in the capacitor 16 at time t=τ1, thereby toinversely bias the base-emitter of the transistor 14. In FIG. 11C, theinitial charging voltage of the capacitor 16 is expressed by -Vo(=-Vc1)and the initial current of the secondary winding 13b is indicated by Io.During the period 64, electric energy stored in the capacitor 16 isdischarged through the resistor 15 and the primary winding 13a. As aresult, the base-emitter of the transistor 14 is slightly forward-biased(FIG. 12C). As a result of the forward-biasing, the transistor 14 isagain positively fed back and conductive again. FIG. 12D illustrates thechange of the voltage V_(BE) between the base and emitter of thetransistor 14 during the periods 63 and 64. When the value of theresistor 53 is sufficiently larger than that of the load resistor 54,the initial current Io in the transformer 13 is consumed bysubstantially only the resistor 54. As the result, a change of thevoltage between the base and emitter of the transistor during the period64 is very gentle, as is evident from the waveform 65 indicated by a onedot chain line. As the value of the resistor 53 approaches to the valueof resistor 54, the initial current Io shown in FIG. 11C is consumed bythe resistors 53 and 54. Accordingly, the change of the base-emittervoltage of the transistor 14 is illustrated by the waveform 66 indicatedby a solid line in FIG. 12D. If a fly-wheel diode (not shown) isconnected across the primary winding 13a, and the initial current Ioshown in FIG. 11C is abruptly consumed, the base-emitter voltage V_(BE)abruptly decreases like the waveform 67 indicated by a broken line inFIG. 12D to zero without passing through the period 64. In this case,the off-period of the transistor 14 is determined only by the timeconstant of a series circuit formed of the resistor 15 and the capacitor16. For example, the off-time of the output signal from the oscillatingcircuit may be controlled by adjusting the consumption of the initialcurrent Io with the connection of a series circuit of the fly-wheeldiode 76 and variable resistor 78 between both ends of the primarywinding 13a, as will be described later with reference to FIG. 14.

The pulse width adjusting means 17 and 18 shown in FIG. 11A may bemodified as shown in FIGS. 13A and 13B. In FIG. 13A, the series circuitof the diode 18 polarized as shown and the transformer 70 is connectedacross the capacitor 16 and a variable resistor 71 is connected to thesecondary winding of the transformer in series. In FIG. 13B, the seriescircuit of the photoresistor 72 and the diode 18 is connected across thecapacitor 16 and a photoresistor 72 is controlled responsive to lightemitted from the photodiode 73. A power source 74, a variable resistor75 and a photodiode 73 are connected in series.

In the blocking oscillating circuit shown in FIG. 14, a series circuitof a fly-wheel diode 76 and a variable resistor 78 is connected acrossthe primary winding 13a of the transformer 13. A smoothing capacitor 77is connected across the resistor 78 in parallel. The period of outputpulses from the oscillator may be controlled by adjusting the resistanceof the variable resistor 78. The capacitor 77 also serves to limit thepeak value of the transient voltage applied to the transistor 14.

An oscillating circuit with a means capable of stabilizing anoscillating frequency even if it can not individually set or adjust thepulse width and the pulse stop period of an output signal from theblocking oscillating circuit, is applicable for the DC-DC convertershown in FIG. 4. Such an oscillating circuit is illustrated in FIGS. 15to 23, which will be described hereinafter.

A different point of the blocking oscillating circuit shown in FIG. 15from that shown in FIG. 1 is that a diode 81 polarized as shown isinserted between the secondary winding 13b (TB) of the transformer 13(T) and the transistor 14 (TR). In FIG. 15, the base current supplied tothe transistor 14 (TR), when the charge of the capacitor 16 (C) isdischarged into the power source 55 (E) during the pulse stop period TS(FIG. 2E), flows into the transistor 14 through the diode 81 in aforward direction. At this point, the circuit of FIG. 15 is the same asthat in FIG. 1. In the process of the transistor 14 changing from theon-state to the off-state, however, the capacitor 16 is not shortedthrough the transistor 14, since even if the current flowing through thesecondary winding 13b is reversed, the reversed current is blocked bythe diode 81. Even when the oscillating frequency is high and the riseand fall times of the transistor 14 are problematic, the discharge fromthe capacitor 16 which is performed through the emitter-base path of thetransistor 14 is blocked by the diode 81. Therefore, the oscillatingoperation is stable. Further, the breakdown between the base and emitterof the transistor 14 is prevented by the diode 81. In an experimentconducted by the inventors of the present patent application, a 2SC2238(Toshiba standard) was used for the transistor 14, and a 470 pFcapacitor was used for the capacitor 81. When the diode 81 was notinserted, a voltage of about -10 V across capacitor 16 increased toabout -1 V when the transistor 14 was cut off. As a result, the stopperiod T_(S) (FIG. 2E) was about the half of the design value. When anIS1585 (Toshiba standard) was used for the diode 81, the charged voltageacross the capacitor 16 remained unchanged at the cutoff time of thetransistor 14, and the stop period T_(S) of design value was obtained.

The circuits shown in FIGS. 16 to 23 are modifications of the circuitshown in FIG. 15. In the circuit shown in FIG. 16, the diode 80 forabsorbing the excitation current in FIG. 15 is omitted. Since a diode 81is provided, however, the oscillating output is stabilized. In FIG. 17,a diode 81 is inserted between the capacitor 16 and the emitter of thetransistor 14. This circuit connection can prevent the capacitor 16 fromdischarging through the emitter-base path of the transistor 14 at thecutoff time. Therefore, the oscillating output can be stabilized. InFIG. 18, a diode 81 is inserted between a connection point between theresistor 15 and the capacitor 16, and the secondary winding 13b. Thecircuit of FIG. 18 can also attain the same effect of the circuit ofFIG. 15. In the circuit shown in FIG. 19, a resistor 82 is connected inparallel with the diode 81 shown in FIG. 15 to control forward andbackward impedances of the diode 81. This circuit can also stabilize theoutput of the oscillating circuit. In the circuit shown in FIG. 20, avariable impedance 83 is used for the resistor 15 in FIG. 15 to changethe circuit time constant and to change the oscillating frequency. Inthe circuit shown in FIG. 21, a variable impedance circuit 84 isconnected in parallel with the capacitor 16 to change the oscillatingcondition. In the circuit of FIG. 22, a quartic winding 13d isadditionally provided in the circuit shown in FIG. 15 and theoscillating condition is controlled by adjusting the impedance of thequartic winding by the control circuit 85. The circuit shown in FIG. 23has a variable impedance circuit 86 for changing the oscillatingcondition connected between the anode of the diode 81 and the emitter ofthe transistor 14.

What we claim is:
 1. A DC-DC converter comprising:an ideal transformerwith a leakage inductance and an exciting inductance in the primaryside; a capacitor connected in parallel with said exciting inductance ofsaid ideal transformer; switching means of the voltage resonance typeincluding a switching element connected between said primary side ofsaid ideal transformer and an input DC power source, said switchingmeans periodically interrupting a voltage of said DC power source; ablocking oscillating circuit with output stabilizing means whichdirectly receives a voltage of said input DC power source and controlssaid switching means by the oscillating output; and means for rectifyingand smoothing the output from the secondary side of said idealtransformer and for supplying the rectified and smoothed output to aload; wherein said blocking oscillating circuit comprises, a switchingtransistor, a transformer including a primary winding connected inseries to said switching transistor and excited by the voltage of saidinput DC power supply source, a first secondary winding for applying afeedback signal to the base electrode of said switching transistor, asecond secondary winding for applying a control signal forintermittently interrupting said switching means, and a third secondarywinding for setting a pulse stop period of the pulse to be obtained atthe output end of said switching element of said switching means, andelectrostatic shielding means for electrostatically shielding saidsecond secondary winding from the remaining winding of said transformer.2. A DC-DC converter according to claim 1, wherein said switchingelement is a bipolar transistor.